Analog IC Design Manager

The team operates across Stansted (UK) and Ottawa (Canada), working closely with global colleagues to deliver high-performance transimpedance amplifiers (TIAs) and laser driver ICs supporting data rates up to 200G. These technologies are critical to enabling the continued growth of data centres, 5G infrastructure, and fibre-to-the-home networks., The Analog Design Manager leads analog and mixed-signal design engineering activities across multiple high-speed IC product lines, owning the full new product introduction (NPI) lifecycle from product definition through to volume production. The role is responsible for directing a multidisciplinary team of circuit designers and layout engineers, driving technical execution across concurrent development programmes, and ensuring robust delivery of high-performance IC designs aligned to business and customer requirements.,

• Lead and manage a multidisciplinary team of analog circuit designers and layout engineers, including goal setting, performance management, recruitment, and capability development (20%).
• Own end-to-end NPI execution across multiple high-speed IC programmes, from concept and architecture through to tape-out, qualification, and production ramp (25%).
• Translate product roadmap and system requirements into executable analog design plans, ensuring alignment with schedule, cost, and performance targets (10%).
• Drive design execution across concurrent programmes, including scheduling, resource planning, and risk management (10%).
• Collaborate closely with Marketing, Product Definition, Applications, Product Engineering, Test, Validation, and Reliability teams to ensure full alignment with customer and system requirements (10%).
• Lead pre-tape-out reviews, ensuring design compliance against specification, layout verification, and production readiness (10%).
• Oversee post-silicon bring-up, silicon correlation, and performance optimisation to improve first-pass success rates and product maturity (10%).
• Prepare and present technical updates, design reviews, and programme status reporting to senior leadership, ensuring clear visibility of risks, milestones, and delivery progress (5%).
  
  Bachelor's degree in Electrical or Electronic Engineering, or related technical discipline required
• 10+ years' experience in semiconductor analog design required
• 5+ years' experience in a leadership or engineering management role required
• Hands-on experience in analog circuit design, mixed-signal integration, simulation, and IC verification
• Proven experience leading NPI programmes within semiconductor development environments
• Strong ability to manage multiple concurrent projects under schedule and resource constraints
• Excellent communication and stakeholder management skills across cross-functional engineering organisations, Master's degree in Electrical or Electronic Engineering or related discipline preferred
• Experience in optical communication IC design, including laser drivers and transimpedance amplifiers
• Experience with SAP, semiconductor design tools, and advanced analog simulation environments
• Experience supporting or leading high-speed IC development programmes through full product lifecycle
• Exposure to semiconductor device physics and analog design optimisation techniques
• Experience implementing engineering standards, methodologies, or design governance frameworks
• Project or programme management certification (e.g., PMP) preferred
  
  Semtech's High-Speed IC Design team is a highly experienced and collaborative engineering group developing industry-leading analog and mixed-signal solutions for next-generation optical communication systems., At Semtech, we seek innovation and leadership from every member of our team. We invest in our people with the support, resources, and opportunity to excel - and we recognise and reward those who drive results.
This role is an outstanding platform to grow as both an engineering leader and a technical authority, with a clear pathway into more senior leadership as the business continues to scale.